The present application claims priority of Japanese Patent Application No. Hei-7-169642 filed on Jul. 5, 1995 and Japanese Patent Application No. Hei-7-227987 filed on Sep. 5, 1995.
1. Field of the Invention
The present invention relates to a multi-chip module and production method thereof, and in particular relates to a multi-chip module and production method thereof, which do not adversely influence the environment in the processes from production to disposal thereof.
2. Description of the Related Art
A multi-chip module (including a hybrid IC) is such that a plurality of electronic elements, including an active element and a passive element, are mounted on a substrate having wiring circuits, and the mounting area is sealed. Since a plurality of electronic elements are made as modules, the multi-chip module has very high reliability. Furthermore, since it is possible to mount bare chips, the multi-chip module is suitable for a high density mounting of electronic elements.
In a conventional multi-chip module, electronic elements are mounted on, for example, a ceramic multi-layered substrate, using lead containing members such as solder and bumps, etc. Sealing members, for example, metal caps are sealed to a substrate by solder containing lead.
A conventional method for mounting passive electronic elements such as resistors, capacitors, etc. on a substrate which constitutes a multi-chip module, is the following, for example:
An eutectic solder paste, in which for example, the molar ratio of Sn:Pb is 63:37, is disposed on a die pad formed on a substrate by, for example, screen printing. Subsequently, electronic elements such as chip resistors, chip capacitors, etc. are loaded in face with electrodes thereof and the die pad. Thereafter, the solder is reflown by infrared rays, whereby the substrate and electronic elements are electrically and mechanically connected to each other. Metallic film consisting of for example, Ag/Pd (Ag--Pb alloy), Ag, etc. is formed at the electrodes of electronic elements such as, for example, chip resistors, chip capacitors, etc., and in order to enhance the wettability, for example, eutectic solder in which the molar ratio of Sn:Pb is 63:37 is plated on the metallic film.
After electronic elements are mounted, cleaning must be carried out with, for example, an organic solvent in order to remove the flux which was used to enhance the wettability of solder. This cleaning is a requisite process in order to secure the reliability of the multi-chip module.
A conventional method for mounting active elements such as semiconductor elements including CPUs, memory chips, etc. on a substrate which constitutes a multi-chip module, is the following, for example:
Firstly, a description will be given of a face-up mounting.
Back metallized layer is formed on the second face, which is the another surface of the first surface on which electrodes are formed, of a semiconductor.
A bonding agent such as, for example, an Au--Sn eutectic solder paste, eutectic solder paste in which the molar ratio of Sn:Pb is 63:37, or eutectic solder paste in which the molar ratio of In:Pb is 50:50 is disposed on a die pad formed on a substrate by, for example, a screen printing. Subsequently, electronic elements such as semiconductor elements are mounted in such a manner that the second face thereof is opposite to the die pad. Thereafter, the solder is reflown by infrared rays or the like, whereby the substrate and semiconductor elements are electrically and mechanically connected to each other. In a case where an Sn--Pb eutectic solder is used, it is necessary to form barrier metal on the die pad and at the metallized layer of the second face of semiconductor elements in order to prevent the diffusion of Sn--Pb eutectic solder.
In this case, after electronic elements such as semiconductor elements are mounted, cleaning must be carried out with an organic solvent or the like in order to remove the flux which was used to enhance the wettability of solder.
After the flux constituents are removed, electric connection is achieved between the substrate and semiconductor elements by bonding the electrodes which are inner lead bonding pads (I.L.B. pads) of the first face of the semiconductor elements to the bonding pads (the outer lead bonding pads : O.L.B. pads) formed at the substrate by means of remarkably fine bonding wires made of Au, Cu, Al, or the like.
On the other hand, the following is a method for a flip chip bonding (race down bonding) of electronic elements such as semiconductor elements on a substrate.
Barrier metal is formed at the electrodes that are inner lead bonding pads of Al or the like formed at the first face of the semiconductor elements to be mounted by, for example, vapor deposition or sputtering. And, solder bump in which the molar ratio of Sn:Pb is 10:90 is formed on -he barrier metal by vapor deposition, plating, bonding or the like. The first face of semiconductor elements at which solder bumps are thus formed is face down bonded to the connecting location of a substrate with the eutectic solder paste in which the molar ratio of Sn:Pb is 63:37 by the infrared reflow process, whereby the die pads and solder bumps are electrically and mechanically connected to each other.
Also in this case, after electronic elements such as semiconductor elements are mounted, cleaning must be carried out with, for example, an organic solvent in order to eliminate the flux which was used to enhance the wettability of solder.
Thus, in any cases, where active elements such as semiconductor are mounted by face up bonding, or mounted by face down bonding, it is essential to eliminate flux constituents.
The following is a method for a sealing the substrate on which electronic components are already mounted.
A sealing pattern is formed in advance in the circumjacent of an area of a substrate where electronic elements are mounted. The sealing pattern may be formed simultaneously with die pads, O.L.B. (outer lead bonding) pads or the like at which electronic elements are mounted.
For example, an Sn--Pb based solder is loaded on the sealing pattern and a metal cap is disposed with the opening edge coincident, whereby the sealing pattern and metal cap are soldered. As for solder, eutectic solder containing a large amount of lead, such as Sn:Pb is 63:37, is employed in order to enhance the reliability of the connection between the metal cap and sealing pattern.
In a case where a substrate made of inorganic materials such as alumina ceramic is utilized, the metal cap is made of Fe--Ni--Co based alloy and Fe--Ni based alloy such as Fernico, Kovar or the like, the thermal expansion coefficient of which is nearly equal to that of the substrate. A solder coating film is formed on the surface of such a metal cap in order to improve the solder wettability.
Also after the metal cap is soldered, cleaning must be carried out with, for example, organic solvent, in order to eliminate the flux constituents.
FIG. 14 is a view showing a brief structure of a conventional multi-chip module 900a.
For example, an inorganic substance based multi-layered substrate 901 such as ceramic has a wiring pattern having a mounting pad (outer lead bonding pad : O.L.B. pad) 903 made of tungsten(W) having a thin Ni/Au plating layer, for example, which is formed at the connecting location in the first area of the first face where electronic elements are mounted. The mounting pads (O.L.B. pads) 903 of the multi-layered substrate 901 are electrically and mechanically connected to the Al electrodes (I.L.B. pads) 904 of semiconductor elements 902 with solder 905 having lead and solder bumps 905 containing lead.
A sealing pattern 907 is formed in advance at the multi-layered substrate 901 in such a manner that the first area is enclosed in which electronic elements including semiconductor elements 902 are face-down bonded. The sealing pattern 907 and the opening edge portion 908a of the metal cap 908 are sealed with solder 910.
The multi-layered substrate 901 has a plurality of insulating layers 901a made of, for example, alumina ceramic and a wiring pattern 901b. The wiring pattern 901b is disposed between the insulating layers 901a. Furthermore, multi-layered substrate 901 is provided with a connection means with peripheral circuits such as input/output pads 909 and input/output leads (not illustrated).
The connection between the Al electrodes (I.L.B. pads) 904 of semiconductor elements 902 and the mounting pads (O.L.B. pads) 903 of the multi-chip substrate 901 are established with solder (Sn:Pb=63:37) 905 which connects solder bumps (Sn:Pb=10:90) 906 secured at the Al electrode 904 face and mounting pads (O.L.B. Pads) 903.
The opening edge 908a of the metal cap 908 consisting of Kovar or Fe/Ni 42 alloy and sealing pattern 907 are sealed with solder (Sn:Pb=63:37) 910.
Eutectic solder, the Pb constituent ratio of which is high, is used to promote the solder wettability, and in order to secure the reliability of the multi-chip module 900a. After semiconductor elements 902 are mounted with solder 905 and the metal cap 908 is sealed with solder 910, the multi-chip module must be cleaned with an organic solvent in order not to remove any residue of the flux constituents of the solder.
FIG. 15 is a view showing a brief structure of a conventional multi-chip module 900b.
For example, as for an inorganic material based multi-layered substrate 901 such as a ceramic multi-layered substrate, a wiring pattern having a mounting pad 903 at the connecting location of electronic elements. The mounting pad 903 is formed at the first area of the first face where electronic elements are mounted at the first area of the first face on which electronic elements are mounted. A semiconductor element 902 as a active element and a chip capacitor 921 as a passive element are mounted at the multi-layered substrate 901 via conductor pads 903.
The mounting pads 903 of the multi-layered substrate 901 are mechanically connected to the second face of semiconductor elements 902 with solder (for example, In:Pb=50:50 or Sn:Pb=63:37). The second surface, the other side surface on which electrodes are formed, of the semiconductor element 902 is metallized in advance with Al, etc.
Similarly, the mounting pads 903 are electrically and mechanically connected to the chip capacitor 921 with solder 905. The electrode of the chip capacitor 921 is coated with Ag/Pd, and furthermore solder coating films 923 (for example, Sn:Pb=63:37) are formed.
The Al electrodes 904 of the first face of the semiconductor elements 902 are electrically connected to the mounting pads 903 of the multi-layered substrate 901 by bonding wires 922 (for example, fine wires made of Au or Al).
The first area where the semiconductor elements 902 as an active elements, passive element 921, etc. are mounted is thus covered, whereby a sealing pattern 907 is formed on the multi-layered substrate 901 surface. The opening edge portion 908a of the sealing pattern 907 and metal cap 908 is sealed with solder 910 (for example, Sn:Pb=63:37).
The metal cap 908 is made of, for example, kovar or Fe/Ni 42 alloy with thin solder coating films (Sn:Pb is 63:37, for example).
The construction of the multi-layered substrate 901 is similar to that of a multi-chip module shown in FIG. 14.
As a multi-layered substrate 901, the mounting area can be covered with a thin flexible film made of resin having wiring circuits. For example, a ceramic multi-layered substrate having a thin film made of a polyimide as a insulating layer and a wiring layer made of Cu on the surface reduces capacitance of the wiring pattern, and improves the signal transfer characteristics.
In the multi-chip module 900b, eutectic solder having a high Pb constituent ratio is employed to promote solder wettability, and in order to secure the reliability of multi-chip modules 900b. After semiconductor elements 902, chip capacitors 921, etc., are mounted with solder and a metal cap 908 is sealed with solder 910, they are cleaned with an organic solvent to remove any residue of the flux constituents of solder.
Thus, in conventional multi-chip modules, connecting materials containing lead are used to mount electronic elements and to connect the metal cap.
Therefore, in order to secure the reliability of multi-chip modules, a process for eliminating flux constituents is requisite. For cleaning flux constituents, for example, halogenized hydrocarbon such as freon, chlorofluorocarbon, trichloroethane, etc. were conventionally used. However, in order to prevent the ozone layer from being destroyed and to preserve the earth environment, the use of such chlorofluorocarbon has been regulated all over the world. Cleaning agents which are not regulated may be used. However, such cleaning agents are not sufficient to remove flux constituents, and it is difficult to establish an enough reliability of the multi-chip module.
Furthermore, not only does the flux cleaning process itself incur a cost, but also the cost of cleaning agents which are not regulated is high, and it causes the production cost of the multi-chip module expensive.
In other words, as described above, conventional multi-chip modules use bonding materials containing lead when mounting electronic elements and connecting sealing members.
Lead is highly toxic, and the use thereof has recently become a serious social problem.
Since lead has a high toxicity and the assimilation thereof into the human body impairs the nervous system and/or fecundity, the handling of lead and substances containing the same is regulated. Accordingly, it is necessary to handle lead safely when producing multi-chip modules. Therefore, the facilities and labor cost therefor are required, thereby causing the production cost of multi-chip modules to be made expensive.
Still furthermore, the concern for environmental destruction has been recently risen, and disposal of waste electronic devices and components in which solder alloys containing lead was used has become a social problem.
That is, it was general for the waste of disposed electronic devices including solder alloys containing lead to be disposed by being buried in soil together with industrial and general waste.
However, in a case where complex waste containing harmful substances such as lead contained in waste electronic devices are buried for disposal, the lead constituent may dissolve and come out due to precipitation or the like, whereby the soil and underground water may be contaminated and the environment is seriously influenced. This is also a serious problem. Especially, the dissolution quantity of lead from solder alloy due to acid rain radically increased, and there is a worry that the environment and nature will be seriously influenced. The waste containing lead is treated and disposed in a controlled treating facility, the cost of which is very expensive. Since it is difficult to remove solder containing lead, recycling is difficult, too.
Therefore, it takes much cost for disposing conventional multi-chip modules. In other words, since conventional multi-chip modules contain harmful lead and are dangerous, much cost is required in every step of the life cycle of conventional multi-chip modules from the production thereof to adequate treatment thereof as waste.
In either case, the construction and production of conventional multi-chip modules in which lead is used must be replaced. Of course, although such an effort has been made, a cost-suppressed and practical means has not yet been established.